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National_Day
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HDLBits-day3
本文字数: 1.4k 阅读时长 ≈ 2 分钟
HDLBits-day2
本文字数: 1.5k 阅读时长 ≈ 3 分钟
Bitwise vs. Logical Operators
Description
Earlier, we mentioned that there are bitwise and logical versions of the various boolean operators (e.g., norgate). When using vectors, the distinction between the two operator types becomes important. A bitwise operation between two N-bit vectors replicates the operation for each bit of the vector and produces a N-bit output, while a logical operation treats the entire vector as a boolean value (true = non-zero, false = zero) and produces a 1-bit output.
Look at the simulation waveforms at how the bitwise-OR and logical-OR differ.
HDLBits_day1
本文字数: 1.6k 阅读时长 ≈ 3 分钟
HDLBits刷题
Exams/ece241 2013 q12
Introduction
In this question, you will design a circuit for an 8x1 memory, where writing to the memory is accomplished by shifting-in bits, and reading is “random access”, as in a typical RAM. You will then use the circuit to realize a 3-input logic function.
First, create an 8-bit shift register with 8 D-type flip-flops. Label the flip-flop outputs from Q[0]…Q[7]. The shift register input should be called S, which feeds the input of Q[0] (MSB is shifted in first). The enable input controls whether to shift. Then, extend the circuit to have 3 additional inputs A,B,C and an output Z. The circuit’s behaviour should be as follows: when ABC is 000, Z=Q[0], when ABC is 001, Z=Q[1], and so on. Your circuit should contain ONLY the 8-bit shift register, and multiplexers. (Aside: this circuit is called a 3-input look-up-table (LUT)).
FPGA的跨时钟信号处理
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待补充…
Vivado安装后添加芯片和插件的方法
本文字数: 245 阅读时长 ≈ 1 分钟
2022国庆放假安排
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为树莓派3B+编译OpenWrt固件
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为树莓派3B+编译OpenWrt固件
1. 源码获取
1.1 获取OpenWrt源代码
1 | git clone https://github.com/coolsnowwolf/lede.git |
1.2 获取插件源代码
方法一:联网获取
1 | 1. sed -i '$a src-git kenzo https://github.com/kenzok8/openwrt-packages' feeds.conf.default |
OpenWrt系统编译
本文字数: 1.6k 阅读时长 ≈ 3 分钟